silicon

NEW PART NEWS RASPBERRY PI CUTS OUT THE MIDDLEMAN

Raspberry Pi has just announced that they’ll be selling their RP2040 microcontroller chips by the reel, directly to you, at a decent discount. About a year ago, Raspberry Pi released its first piece of custom silicon, the RP2040 microcontroller. They’ve have been selling these chips in bulk to selected customers directly, but have decided to open up …

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ON SEMI – SILICON PHOTOMULTIPLIER RB-SERIES

ON Semi’s RB Series of red-enhanced second generation Silicon Photomultipliers (SiPM) with high responsivity at a low bias voltage. MicroRB−Series sensors are the second release of Silicon Photo− multipliers (SiPM) from ON Semiconductor’s R-Series range. These sensors provide further sensitivity improvements in the red and NIR region of the electromagnetic spectrum. All R-Series SiPM sensors …

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IMEC INVENTED UNIQUE COST-EFFECTIVE COOLING FOR HIGH-PERFORMANCE CHIPS

Imec, the distinguished Belgian research center has invented a new and cost-effective method of cooling chips. This achievement can be an important innovation to tackle the ever-increasing cooling demands of high-performance 3D chips and systems. Present powerful electronic systems have high cooling demands for integrated semiconductor chips. Conventional solutions operate with various passive (or occasionally active) …

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Silicon Labs adds to capacitive sensing MCUs

Silicon Labs is sampling capacitive sensing microcontrollers (MCUs) for human-machine interfaces (HMI). The C8051F97x MCU is for Internet of Things, home/building automation, consumer and industrial markets. It targets battery-powered and capacitive touch sensing applications for handheld industrial devices, toys, gaming machines and remote controls, as well as touch-panel switch replacements for white goods such as …

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Adaptive DDR4 silicon IP runs at 2.8Gbit/s, says Uniquify

Uniquify is claiming its adaptive DDR4 silicon IP running at 2.8Gbit/s with SK Hynix’s DDR4 SDRAM memory components implemented using TSMC’s 28HPM process technology. The adaptive DDR4 IP dynamically tracks and adjusts the critical DDR timing interface to allow the DDR4 SDRAM to be clocked at a higher rate without sacrificing the stability or integrity of the DDR memory subsystem. “We’re …

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