(This article is part of the The Fabric of Computing series: in search of simplicity)
Here is a fun project, created from start to finish by Matthias Koch, as part of his Mecrisp implementation of Forth:
In itself, this is no big deal. The generated pattern is a 16×16 expanded pixel image, and 640×480 displays are pretty basic by now – although they’re fine for presenting text-mode information and retro games.
The interesting bit is the simplicity of the underlying technology. The entire build consists of an FPGA with 1280 “logic cells”. Think of them as the stem cells of digital circuitry, i.e. the building blocks which can be used to create just about anything digital:
A bit over 1000 of these plus 64 Kbits of memory, is all it takes to implement a little Forth compiler plus runtime, with enough storage and power to turn it all into a VGA display with randomly updating patterns.
That’s 60 video images per second, with 525 scan lines of 800 pixels each (of which only 480 by 640 actually contain image data). The full resolution would require a 25 MHz “pixel clock” rate, but by stretching pixels and repeating lines 16 times, we get a more manageable data rate to produce the above.
Matthias’ Forth code is a mere 100 lines long (source on GitHub) and an intriguing example of what can be done on such an absolutely minimal hardware core (adapted from James Bowman’s tiny j1a soft cpu).
Just to drive the point home: 1) an FPGA does not have video hardware, 2) the soft µC implemented on top of it is equally general-purpose, and 3) all video signal-generation is done in Forth, i.e. 100% in software!
For more detail: TFoC: FPGA & Forth = VGA